SAN JOSE, Calif. and HSINCHU,
Taiwan, R.O.C., April 21, 2014 /PRNewswire/ -- Altera
Corporation (NASDAQ: ALTR) and TSMC (TWSE: 2330, NYSE: TSM) today
announced the two companies have worked together to bring TSMC's
patented, fine-pitch copper bump-based packaging technology to
Altera's 20 nm Arria 10 FPGAs and SoCs. Altera is the first company
to adopt this technology in commercial production to deliver
improved quality, reliability and performance to Altera's 20 nm
device family.
"TSMC has provided a very advanced and robust integrated package
solution for our Arria 10 devices, the highest-density monolithic
20 nm FPGA die in the industry," said Bill
Mazotti, vice president of worldwide operations and
engineering at Altera. "Leveraging this technology is a great
complement to Arria 10 FPGAs and SoCs and helps us address the
packaging challenges at the 20 nm node."
TSMC's leading-edge flip chip BGA package technology provides
Arria 10 devices with better quality and reliability than standard
copper bumping solutions through the use of fine-pitch copper
bumps. The technology is able to accommodate very high bump counts
as required by high-performance FPGA products. It also provides
excellent bump joint fatigue life, improved performance in
electro-migration current and low stress on the ELK (Extra Low-K)
layers, all highly critical features for products employing
advanced silicon technologies.
"TSMC's copper bump-based package technology provides excellent
value for small bump pitch (<150um) advanced silicon products
featuring ELK," said David Keller,
senior vice president, business management, TSMC North America. "We
are pleased that Altera is adopting this highly integrated
packaging technology."
Altera is shipping Arria 10 FPGAs based on TSMC 20SoC process
technology and featuring this innovative packaging
technology. Arria 10 FPGAs and SoCs provide the FPGA
industry's highest density in a single monolithic die and up to 40
percent lower power than the previous 28 nm Arria family. For
additional information visit www.altera.com or contact a local
sales representative.
TSMC's copper bump-based package technology is scalable and
ideal for products that feature large die size and small bump
pitch. It includes a DFM/DFR implementation from TSMC that adjusts
package design and structure for wider assembly process windows and
higher reliability. The technology has demonstrated better than
99.8 percent production-level assembly yields.
About Altera
Altera® programmable solutions enable designers of electronic
systems to rapidly and cost effectively innovate, differentiate and
win in their markets. Altera offers FPGAs, SoCs, CPLDs, ASICs and
complementary technologies, such as power management, to provide
high-value solutions to customers worldwide.
www.Altera.com
About TSMC
TSMC is the world's largest dedicated semiconductor foundry,
providing the industry's leading process technology and the foundry
segment's largest portfolio of process-proven libraries, IPs,
design tools and reference flows. The Company's owned capacity in
2014 is expected to be about 8 million (12-inch equivalent) wafers,
including capacity from three advanced 12-inch GIGAFAB™ facilities,
four eight-inch fabs, one six-inch fab, as well as TSMC's wholly
owned subsidiaries, WaferTech and TSMC China. TSMC is the first
foundry to provide both 28nm and 20nm production capabilities. Its
corporate headquarters are in Hsinchu, Taiwan. For more information about TSMC please
visit http://www.tsmc.com.
ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS
and STRATIX words and logos are trademarks of Altera Corporation
and registered in the U.S. Patent and Trademark Office and in other
countries. All other words and logos identified as trademarks or
service marks are the property of their respective holders as
described at www.altera.com/legal.
SOURCE TSMC